| 0x00 |
R |
Keyboard Input Row 0 |
| 0x01 |
R |
Keyboard Input Row 1 |
| 0x02 |
R |
Keyboard Input Row 2 |
| 0x03 |
R |
Keyboard Input Row 3 |
| 0x04 |
R |
Keyboard Input Row 4 |
| 0x05 |
R |
Keyboard Input Row 5 |
| 0x06 |
R |
Keyboard Input Row 6 |
| 0x07 |
R |
Keyboard Input Row 7 |
| 0x08 |
R |
Keyboard Input Row 8 |
| 0x09 |
R |
Keyboard Input Row 9 |
| 0x10 |
W |
Printer/μPD1990(RTC) Data |
| 0x11-0x1F |
W |
Mirror of 0x10 |
| 0x20 |
RW |
μPD8251(USART) Data |
| 0x21 |
RW |
μPD8251(USART) Command/Status |
| 0x22-0x2F |
RW |
Mirror of 0x20 (even addresses) and 0x21 (odd addresses) |
| 0x30 |
W |
Cassette Deck Control, CRT Resolution/Colour |
| 0x31-0x3F |
W |
Mirror of 0x30 |
| 0x40 |
RW |
BEEP, RTC, Printer, CRT, CMT Control/Status |
| 0x41-0x4F |
RW |
Mirror of 0x40 |
| 0x50 |
RW |
μPD3301(CRT) Parameter |
| 0x51 |
RW |
μPD3301(CRT) Command |
| 0x60 |
RW |
μPD8257(DMA) Channel 0(Expansion Slot Bus) Address |
| 0x61 |
RW |
μPD8257(DMA) Channel 0(Expansion Slot Bus) Counter |
| 0x62 |
RW |
μPD8257(DMA) Channel 1(Expansion Slot Bus) Address |
| 0x63 |
RW |
μPD8257(DMA) Channel 1(Expansion Slot Bus) Counter |
| 0x64 |
RW |
μPD8257(DMA) Channel 2(VRAM) Address |
| 0x65 |
RW |
μPD8257(DMA) Channel 2(VRAM) Counter |
| 0x66 |
RW |
μPD8257(DMA) Channel 3(Unused) Address |
| 0x67 |
RW |
μPD8257(DMA) Channel 3(Unused) Counter |
| 0x68 |
RW |
μPD8257(DMA) Mode/Status |
The following table describes the keyboard matrix's layout. Highlighted values correspond to numpad keys.